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Design and implementation of a verified interpreter for additive manufacturing programs

Talkat FUNARCH 2024 · on Friday, 2024-09-06· [embedded-and-hardware]
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A verified interpreter for RS-274 G‑code is implemented by extracting verified components into OCaml and composing them with handwritten driver code; about 54% of the codebase is verified while 46% remains unverified (parser, I/O). Core verification uses Y3 for modal state logic and Coq plus FLock-extracted float libraries for geometry; the tool checks invariants (finite coordinates), enforces bounding‑box and arc‑bound violation detection, emits full toolpath traces, and flags failures with diagnostic reports.

AI-written summary · about

  1. 0:00Additive manufacturing intro
  2. 3:05Current validation limits
  3. 5:33Motivation for verified verification
  4. 7:39RS274 G-code standard
  5. 13:43Verified interpreter design
  6. 15:48High-level interpreter design
  7. 18:17Verification challenges
  8. 20:43Y3 and Coq verification
  9. 23:12Physical state verification
  10. 24:36Effects in verified code
  11. 25:40Results and codebase
  12. 26:44Domain constraint checks
  13. 29:543D print tool path visualization
  14. 31:03Verification lessons learned
  15. 33:29Future directions
  16. 43:25Q&A
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