PVH Technical Deep Dive
summary
PVH aims to combine PV simplicity with HVM features by using the HVM path with PVH special-cases so patches stay small, but the series is not yet upstream and several features remain unimplemented: 32-bit guests, virtual TSC and vCPU hotplug. PVH runs guests always in 64-bit paging and auto-translates guest-managed page tables (GPFNs in a P2M), changing grant/IO semantics; programmed IO/SMM requires an instruction-execution emulation hack. Early results show clearer code and potential TLB/HAP wins but several races and platform edge-cases still need fixes.
AI-written summary · about
chapters (15)
- 0:00Introduction
- 1:18Why PVH
- 5:33History of PVH
- 8:58PVH Paths
- 10:31Disables
- 11:30Translate
- 12:28Special Pages
- 13:01PVH CP
- 14:01PVH Issues
- 14:39HVM Path
- 15:59Pio Instructions
- 18:21PVH IO Path
- 20:48PVH vs Shadow
- 25:22Summary
- 25:46Questions
related talks
30mNested Virtualization (X86) Part II
11mAdvanced Parallel Memory Virtualization
30mNested Virtualization (X86) Part I
36mShared Virtual Addressing for High Performance Arm Infrastructure Platforms
23mHyper-V's Virtual Secure Mode in KVM project update
22mAMD-vIOMMU: A Hardware-assisted Virtual IOMMU Technology
31mHardware Friendly Vhost vDPA: Towards an Efficient and Migratable Device Model
26mHardware Assisted PMU Virtualization
