I + I2C = I3C: What's in this Additional 'I'?
summary
I3C v1 claims higher throughput (up to 12.5 MHz clock with DDR/ternary HDR modes), lower power, dynamic address assignment via the DAA discovery sequence, and in-band interrupts so no extra GPIO lines. Linux work includes an RFC and a kernel framework: controller API is synchronous, device API supports SDR/HDR transfers and non-atomic IBI handlers with slot allocation. Implementation is tested against a dummy slave and RFC v2 is submitted; a real GPIO-expander driver is planned to validate end-to-end behavior.
AI-written summary · about
chapters (6)
- 0:00Start
- 13:37run the clock at 12 megahertz
- 20:16attach the device to a specific driver
- 37:49separated the api for device driver and master controller
- 39:08bind devices to specific drivers
- 42:39specify the max payload size
