Prefetching in Hybrid Main Memory Systems
Talkat 12th USENIX Workshop on Hot Topics in Storage and File Systems (HotStorage '20) · 2020-07-13..07-14
summary
Builds a DRAM cache prefetcher for hybrid DRAM+PCM main memory that extends the Alloy Cache design to prefetch and cache at cacheline and page granularities, reducing costly DRAM tag/data lookups. Implements a hybrid hierarchy where DRAM acts as a multi-granularity cache for NVM and evaluates workloads including genomics and neural-network kernels, reporting up to 2× performance improvement over a state-of-the-art baseline and showing the approach materially reduces NVM accesses and DRAM cache miss penalties.
AI-written summary · about