Cosh: Clear OS Data Sharing In An Incoherent World
summary
Cosh defines a coherence‑oblivious OS abstraction for inter-process I/O sharing (pipes, sockets, shared file systems) that hides the underlying mix of cache‑coherent, non‑coherent shared, and non‑shared memory in heterogeneous systems with accelerators and co‑processors. The authors implemented Cosh in the Barrelfish multikernel and show how to build common OS facilities on top of it, evaluating performance on a system combining commodity cache‑coherent CPUs and prototype Intel many‑core coprocessors.
AI-written summary · about
chapters (15)
- 0:00Start
- 0:33Motivation: heterogeneous multicores
- 1:03Intel MIC prototype
- 1:36Target platform
- 3:04Possible OS models
- 5:16but sharing data is useful!
- 9:25Making it practical
- 11:07Aggregates
- 12:12Trivial example: pipes
- 13:20Real example: file system
- 14:50Prototype implementation
- 16:46DMA transfer to Knights Ferry
- 17:54Panorama stitching
- 19:54Related work
- 28:14Transfers between host cores
related talks
22mOld School cache coherence-a snooping system for a multicore processor based on CVA6
59mThe Wild West of post-POSIX IO Interfaces
17mCoFS: A Filesystem for Fast Container Startup
54mOCF for Resource-Constrained Environments
30mThe Odyssey of HWCAP on RISC-V platforms
03mCXL MC Welcome and Kickoff
25mShared CXL 3 memory what will be required
20mFour Years of Embedded Haskell in Critical Real-Time Systems: Lessons and Insights