Symmetric Circuits and Fixed-Point Logics
summary
Characterizes exactly which graph properties symmetric circuits capture: polynomial-size symmetric circuits without majority correspond to fixed-point logic interpreted over the structure plus a separate ordered number sort, and polynomial-size symmetric majority circuits exactly capture fixed-point with counting (FPC). Proof sketch: convert formulas to uniform symmetric circuits by instantiating gates for subformulas, and conversely recover evaluation in FPC by labeling gates with small constant supports so only permutations of those supports matter, using p‑uniformity on the number sort. Consequences: parity and CFI-style obstructions separate these classes.
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chapters (17)
- 0:00Introduction
- 3:38FixedPoint Logic
- 5:04Ordering Operator
- 6:39Non trivial results
- 8:07Nonuniform circuits
- 10:20Lower bounds
- 11:13Monotone circuits
- 12:17Properties of graphs
- 14:02Syntax
- 17:43Results
- 20:14Questions
- 21:16Main Results
- 23:20Prior Work
- 24:55Main Theorem
- 27:32Choiceless polynomial time
- 28:54Boolean circuits
- 32:13Polynomial time
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