Talk by Chris Pattison (UC Berkeley)
summary
Claim: fault-tolerant universal computation uses only a constant number of global control lines plus a few fully controllable qubits, achieved by compiling 1D measurement‑free concatenated codes (Aharonov‑Ben‑Or style) into a depth‑three periodic circuit laid out as a folded ribbon on a 2D chip. Tools: local swap networks, encoded classical control streams decoded with majority/concatenated decoding, entanglement swapping/teleportation to make a fast random‑access memory. Results: logical memory with polylog overhead, threshold for local stochastic noise, and polylogarithmic time overhead (rather than linear W); requires very uniform qubits and nonstandard hardware.
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chapters (22)
- 0:00Fault-tolerant quantum computation
- 1:05Scaling quantum hardware challenges
- 4:17Classical processor architecture
- 8:12Mapping 1D schemes to 2D tiles
- 15:33Fault-tolerant quantum memory
- 20:142D quantum memory in square
- 21:24Quantum processor with hard-coded circuits
- 24:17Universal operations with control bits
- 27:17Noiseless control from classical codes
- 30:29Processor capabilities and limits
- 36:50Speeding up with classical wires
- 39:45Polylogarithmic time overhead
- 42:25Hardware requirements and challenges
- 43:50Future directions and platforms
- 44:53Fabrication defects and thresholds
- 45:42Control lines in non-adaptive circuits
- 47:06Quantum versus classical decoding
- 47:27Feedback and interactive control
- 48:10Speedup from W to polylog W
- 49:15Simplifying architecture (no-error)
- 49:38Continuous ribbons in neutral atoms
- 51:45Ideal platforms for architecture
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