Nomads and Anvil makers
summary
Argues that timing is essential for efficient FPGA accelerators and presents a concrete solution: a small core language called filament that embeds clocked events and a type system to eliminate structural hazards, backed by proofs and an implementation that compiles to hardware. Shows DSP examples (AB+C as a pipelined dot product), explains why timing enables high throughput, and describes porting the ideas into real tooling like Chisel* used at industry labs.
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chapters (7)
- 0:00Introduction
- 1:50PL research goal
- 3:53What is an FPGA
- 8:27Nomadic PL research
- 13:43PL theory vs hardware
- 15:48Core thesis
- 16:09Q&A
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