Decoupling Data Layouts from Bounding Volume Hierarchies
summary
Scion DSL and compiler separate BVH logical ADTs from physical memory layouts and automatically specialize traversal with destructor and constructor specialization, emitting code for x86, NVIDIA, and ARM. The evaluation explores 19 layouts across 7 scenes, 2 ray distributions, and 3 machines; a novel PBRTQ16 layout is Pareto-optimal in 35 of 42 contexts, about 5× faster than the most space‑efficient layout and using ~2× less memory than the fastest prior layout. Artifacts available.
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chapters (17)
- 0:00Introduction
- 1:04Bounding volume hierarchies
- 2:29Physical layouts of BVH nodes
- 3:31Inter-node optimizations
- 4:55Trade-offs in BVH layout
- 6:40Decoupling logical and physical
- 7:43System overview and code generation
- 8:45Specifying logical interface
- 9:27Layout language constructs
- 10:09Splits and derived fields
- 11:32Advanced layout optimizations
- 12:35Destructor specialization
- 13:37Constructor specialization
- 14:18Performance vs libraries
- 15:24Design space exploration
- 16:27Key takeaways and future
- 16:51Q&A
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