State of ARM-based HPC
summary
ARM-based HPC is already production-ready for many workloads, claiming efficiency gains and real-world ports to Aarch64 and A64FX with SVE 512-bit acceleration; examples include Mont-Blanc designs, ThunderX1/2 deployments, and systems like Astra and Isambard. Infrastructure supports PCIe, CXL/PCIe variants, InfiniBand and CNM600 128‑node chassis links; storage uses Lustre and distributed filesystems. Tooling shows 292 AArch64-tested libraries and applications, container scaling from SoCs to Fugaku‑class nodes, and market notes of an 11% chassis sales drop and ~20% COVID contraction.
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chapters (16)
- 0:00Introduction to ARM in HPC
- 1:08ARM’s evolution in HPC projects
- 2:35What defines HPC systems
- 3:43CPU requirements for HPC
- 5:52ARM ISA versions and implementations
- 7:14SVE and SIMD in ARM HPC
- 9:48ARM ISA in consumer vs supercomputers
- 10:51ARM v8.6 and BF16 support
- 12:48CPU vs accelerators in HPC
- 13:54Interconnect options for HPC
- 15:25FPGA accelerators in HPC
- 16:32Resilience and containers in HPC
- 17:36Scaling HPC with containers
- 18:20HPC applications and libraries
- 19:02HPC in cloud and market trends
- 20:25Future of HPC as a service
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