Vertex Fault-Tolerant Emulators

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Constructs vertex-fault-tolerant emulators that provably use fewer edges than comparable spanners: for multiplicative stretch 2k−1 spanners the known size is ~n^{1+1/k}·f^{1−1/k}, while the emulator construction reduces the f-dependence (up to roughly √f for even k and an optimal bound for odd k). Key tools are a greedy spanner backbone plus sampling emulator edges with probability 1/D^2, a reduction from the Erdős girth conjecture for lower bounds, and a polynomial-time variant via an approximate minimal-fault oracle; additive emulators get an exponential improvement for +2/+4.

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" chapters (22)

1. 0:00Intro
2. 1:45Spanner/Emulator Equivalence
3. 3:29Fault Tolerant Spanners Application
4. 4:34Fault-Tolerant Spanners Application
5. 6:40Fault Tolerant Emulator Definition
6. 7:38Fault Tolerant Emulators - Theoretical Motivation
7. 9:22Practical Motivation: Overlay Network
8. 10:07Fault-Tolerant Emulators: Overlay Network
9. 10:32Fault-Tolerant Emulators: Practical Motivation
10. 11:37Fault-tolerant Emulators vs. Spanners
11. 13:49Additive Emulators
12. 15:37Greedy Algorithm
13. 17:26Greedy Spanner Algorithm-Analysis
14. 18:20Vertex Fault Tolerant Greedy Spanners
15. 19:32From Greedy Spanners to Emulators
16. 20:45F-Vertex Fault Tolerant 3-Emulator
17. 22:22Algorithm Intuition
18. 23:47Analysis Intuition - Sparsity
19. 25:06General F-VET (2k-1)-Emulator
20. 25:45Lower Bounds
21. 27:15Further Results: Polynomial Time Algorithm
22. 28:25Conclusion