Adventures in (Simulated) Asymmetric Scheduling
summary
Argues that current scheduler changes are testable and improvable: uses per-entity load average and Linaro HMP patches, plus a portable perf timechart capture and a scheduler playback/replay tool to run Android traces on mainline kernels. Builds a virtual CPUfreq driver that routes interrupts to throttle cores and simulates big.LITTLE ratios (example: A15=2 BOGO/s @3 batts, A7=1 BOGO/s @1 batt; running tasks of 16 and 20 yields 36s/36 batts on A7 vs 13s/49 batts when packed). Finds load-average mispredicts interactive wakes and needs predictive power-tracking.
AI-written summary · about
chapters (8)
- 0:00Start
- 3:23Complete big.LITTLE system
- 8:46Power Vs Performance (4)
- 14:41The Linaro Angle
- 19:41Alex Shi's power aware patches
- 20:37Miscellaneous power saving ideas
- 34:58Virtual CPUFREQ (1)
- 44:05Questions?
related talks
15mCertified and Efficient Instruction Scheduling: Application to Interlocked VLIW Processors
29mPerformance Optimization on Xen-based Android Device
35mMulti-core Application Development with Zephyr RTOS
40mTips, Tricks, and Gotchas for Linux Real-Time Tuning
46mBuilding Mixed Criticality Linux Systems with the Jailhouse Hypervisor
22mPreview: Hardware and Offloads
41mAn Essential Relationship between Real-time and Resource Partitioning
26mTuning Real-Time Linux for ARM SoCs