Keynote: Employing Senders & Receivers to Tame Concurrency in C++ Embedded Systems
summary
Demonstrates using Intel baremetal senders and receivers library on an ARM dev board (80 MHz core, 256 KB flash, 64 KB RAM) to compose event-driven logic: timers, DMA, UART, 63 interrupt vectors, fixed-priority scheduler and a time scheduler route events into sender chains that carry values, errors and cancellation. Groove and Crew register abstractions turn reads/writes into senders so LED blinking, UART transmit and temperature proxy all become composable sender chains. Claims: senders keep state local, make cancellation first-class, reduce race bugs, but continuation-passing is verbose and some compile times grow.
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chapters (14)
- 0:00Introduction and warm-up
- 3:23Embedded systems challenges
- 4:46Hardware architecture overview
- 9:38Understanding interrupts
- 13:51Interrupt control and logic
- 20:45Service routines and queues
- 27:44Asynchrony and concurrency
- 33:51Introduction to senders
- 37:50Sender interface design
- 47:56Composition with senders
- 56:12Practical implementation
- 1:08:08Timer and scheduling logic
- 1:14:00Register access and logging
- 1:21:01Conclusion and Q&A
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