Yunsu Choi
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| title | conference | date |
|---|---|---|
| Smallest RISC-V Device for Next-Generation Edge Computing | 8th RISC-V Workshop Barcelona 2018 | 2018-05-07 |
A 14 nm RISC‑V system shrinks a processor die to ~0.07 mm² with a separate 32 KB SRAM die (~0.04 mm²) and a <1 mm² silicon interposer using 20 µm bumps for… | ||
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