Anne Merlande
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| title | conference | date |
|---|---|---|
| Ultra Low Power RISC-V Core Retention with Warm Restart Extension | RISC-V Summit Europe 2026 | 2026-06-08 |
SXP5 RISC‑V core adds a retention domain and a tightly coupled retention stack in TCM plus a retention request protocol to save full CPU context and CSRs… | ||
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