~/talk

Providing evidence for the security properties of hardware/software codesigns

Talkat PriSC 2022 · on Sunday, 2022-01-16· [security]
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slides:none on file

Argument: end-to-end proofs need empirical validation for real devices. The team builds an FPGA prototype of VRASED on an MSP430 core, uses F proofs of crypto from HACL and a NuSMV-checked hardware monitor, and still finds concrete failures: attacker-controlled initial stack pointer, a timing side channel in the wrapper, and a DMA-monitoring bug that leaks key bytes. Formal guarantees (memory safety, functional correctness, secret independence) hold locally but integration mismatches break them; recommend case studies, attack competitions and falsifiable assumptions*.

AI-written summary · about

  1. 0:00Introduction
  2. 2:50Overview
  3. 4:20The introduction
  4. 6:20The field of secure compilation
  5. 8:45How low should we go
  6. 9:58The role of the lower layer
  7. 13:47Providing evidence for adequacy
  8. 17:03Models
  9. 19:00Secure Compilation
  10. 20:59Systems
  11. 27:54Case Studies
  12. 28:57Hacklestar
  13. 35:52Hackelstar assumptions
  14. 38:08Hackelstar overview
  15. 39:50Hardware Security Monitor overview
  16. 42:27Hardware Security Monitor examples
  17. 44:22Addressing dismissive comments
  18. 46:34Conclusion
  19. 50:27Questions
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