Secure Debug IoT on v8-M Cortex-M33
summary
Live demo implements TrustZone on Cortex‑M33 using an FPGA‑based ARM Cortex‑M Prototyping System (MPS2 FPGA) with ARM CoreLink SSE-200 and optional ARM TrustZone CryptoCell and Cordio radio. Secure and non‑secure regions are hardware‑enforced; non‑secure code calls secure entry every 500 ms via the new SG instruction; context switches take only a few cycles. Secure Debug via ARM CoreSight SoC can be gated so the debugger cannot read secret RAM, and DMA/peripheral filters block unauthorized access.
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