~/talk

Analysis of AMD HW-assisted vIOMMU Implementation and Performance

Talkat KVM Forum 2021 · 2021-09-15..09-16· [web-performance]
links:none on file
name:Wei Huang
linkedin:hweicdl
slides:none on file

Prototype implements AMD hardware-assisted vIOMMU with QEMU amd_vio device model, host IOMMU driver changes and a guest v2 page-table path; code is pushed as an RFC. Benchmarks use fio (Samsung and Intel NVMe) and netperf (10Gb and 100Gb Mellanox) and report a surprising NVMe bottleneck around ~230 MB/s for the hardware path, while TCP shows near-line-rate on 10Gb and ~30–50 Gbps on 100Gb versus ~20 Gbps baseline for passthrough. Implementation works and improves network I/O versus software vIOMMU but needs fewer IOVA invalidations to lift storage performance; v1/v2 nested IOPT is central to the design.

AI-written summary · about

  1. 0:00Intro
  2. 0:46AMD IOMMU DMA-Remap
  3. 3:01Guest VIOMMU Support
  4. 7:36QEMU Changes
  5. 9:03Host IOMMU Driver Changes
  6. 13:54QEMU & Host IOMMU Driver Interface
  7. 14:47Guest AMD IOMMU Driver Changes
  8. 16:07Configurations
  9. 19:23NETPERE :TCP_STREAM
  10. 22:36PT + VIOMMU Overhead Analysis
  11. 24:17Summary
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