x86 Internals for Fun & Profit
summary
Breaks down how x86 maps C/assembly into micro‑ops, showing that branch prediction and the perf measurements matter: a Python branch-heavy loop runs ~102 ns per element on random data and ~94 ns when sorted (about an 8% speedup) because of better prediction. Describes a 1500-entry micro-op cache that short‑circuits mispredicts, register renaming into 100+ physical registers, six execution ports (three ALUs, two loads, one store), and very expensive divides (dozens to ~80 cycles).
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chapters (13)
- 0:00Start
- 6:26ASM overview
- 9:01ASM example
- 11:27Trip through the Intel pipeline
- 19:22Sandy Bridge Branch Prediction
- 21:20Does it matter?
- 32:44Decode example
- 35:21Decoder
- 37:28Renaming (example)
- 44:12Reservation Station
- 44:42Execution!
- 49:17SRAM vs DRAM
- 51:41Reorder Buffer Write
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