Xiaolin Chen
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what they talk about
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on a stage with
- Aimee Suttononce
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one talk is not yet a subject
| title | conference | date |
|---|---|---|
| Combined Dynamic and Formal Verification Approach to Processor Verification | RISC-V Summit North America 2024 | 2024-10-22 |
Combines Synopsys tools and workflows to find more bugs faster: unit-level formal using VC Formal and assertion IP (AIP) exhaustively checks buffers, decoder… | ||
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